I have written a make file for a simple cpp program containing
#This a makefile for compiling the hello world cpp program. CC=clang++ all: run test.o run: .cpp=.o .PHONY: clean clean: rm -rf *.o run
but this is not compiling my test.cpp. From a tutorial I have taken this idea that
make is intelligent enough to compile dependency and target if nothing is specified.
What is going wrong?