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suppose that you have a program which you installed that from source by make command . That program include files a.cc, b.cc, c.cc, d.cc and ... .

Now I changed a.cc a bit. In order to enable the changes I should compile the program again by make command.

My question: Is make command just recompile the changed files or recompile all of the files.

ps :all of the files are define on as .o on the Makefile.

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    I think if you have something like *.o as a target, then it will act as an incremental compiler. Jul 18, 2014 at 14:09
  • you mean make compile all of them and by *.o we can tell make to compile which file exactly? Jul 18, 2014 at 14:11
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    Edit: See this comment and the corresponding answer. In the case of that answer, if you run make result, it should do an incremental build. Jul 18, 2014 at 14:16

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In general way, You don't need recompile all of .cc files according to modify a .cc file.

The a .cc file is related with other .cc by using .h file.

For example:

Let's guess b.h is a header about b.cc.

And a.cc use b.h.

You don't need recompile a.cc due to modify and compile b.cc.

But You need to recompile about b.h.

If the makefile is created as well(based on autotools), make command will process the dependencies as well.

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  • thanks, you mean that is based on the "how is the Makefile creat for this program?" so is there any way to guess, if my Makefile recompile all of them or just the changed ones? Jul 18, 2014 at 15:45
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    You can use automake, autoconf, configure... Then Makefile is created as optimized for compile just ones must compile. Jul 18, 2014 at 16:02
  • is ./configure is enough ? I installed automake and autoconf before. Jul 18, 2014 at 16:04
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    I am using anjuta to use autotools. If you create Makefile from scratch, I suggest you use developing tools like anjuta. Jul 18, 2014 at 16:09

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